Thalia Design Automation
Thalia Design Automation

Reimagining analog and mixed signal design and IP reuse

Our AMALIA IP re-use platform employs advanced AI algorithms and targeted automation with smart design methodology for the migration of analog and mixed signal integrated circuits.

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Diversify product ranges

AMALIA enables IP houses and IC design companies to re-use and diversify product ranges quickly and cost-effectively.

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Development time and cost savings

Our platform combines advanced AI and world-class engineering to deliver up to 50% savings in development time and costs.

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What we do

Thalia’s AMALIA IP re-use platform repurposes the design of analog and mixed signal integrated circuits – migrating, refining and optimizing existing IP for new technologies and applications. This enables IP houses and integrated circuit manufacturers to re-use and diversify product ranges quickly and cost effectively to meet evolving market demand.

Cost effective solutions

Thanks to AMALIA’s smart design methodology, world class IC/analog design experience and targeted automation, our clients can save up to 50% of the costs associated with traditional redesign processes. It also frees up in-house designers and engineers to develop new products, rather than spending their valuable time re-designing existing solutions.

Faster to market

AMALIA employs AI algorithms to deliver outstanding efficiencies in the analysis, design and verification stages of IP re-use. Combined with our world-class engineering methodology, this results in cutting development time by up to 50%, allowing our clients to react quicker and more effectively to changing market demands.

Reducing cycle times

Migration of analog and mixed signal designs can be labour intensive and result in lengthy cycle times. Our AMALIA suite with its proprietary toolset addresses design validation, modifications and feature enhancements and combines this with our extensive experience in design migration to shorten the cycle time and facilitate multiple variants of a design for different applications.
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Developing variants

Thalia’s approach is also particularly effective in the generation of an IP portfolio of existing analog IP or IC designs. The design cycle time for a single variant of an IP block could be more than six months, and creating a portfolio of devices to address a range of requirements requires substantial development resources, time and investment. Our approach leverages targeted automation which enables our experienced team to rapidly accelerate this process with rapid testing and nudging of the design to meet the varying requirements of different markets.
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Solution optimization

Our targeted automation and AI algorithms enables us to efficiently and quickly identify a set of design solutions to meet the design requirements. This allows for tweaks to the design to rapidly arrive at the optimal solutions for analog and mixed signal circuits.
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Resources

Thalia’s customers are migrating, optimizing and creating key analog blocks for Wifi, Bluetooth and power management IPs. Read our case studies to find out exactly how we can help your analog design effort

Case study: LDO

Thalia saved one of its customers 60% in design time and substantial costs, by generating a complete family of LDO variants from a single 20mA design.

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Case study: LNA

Thalia achieved design centering for intermodulation and power reduction of a low-noise amplifier solution with savings in project cycle time of more than 50%.

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Case study: PLL

PLLs are a vital element in applications such as WiFi and Bluetooth radio. Thalia ported and optimized a 40MHz customer design in a matter of weeks

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Latest news

Thalia helps us to deliver exactly the right feature and performance combination for our customers, against demanding time-to-market and cost requirements. Thalia’s combination of novel design automation technology and analog design expertise is unique in the market: we’ve already seen a positive impact on our ability to deliver against tight customer deadlines

Kave Kianush

Vice President and Chief Technology Officer, Catena