Thalia Design Automation
Thalia Design Automation

Circuit Porting

Thalia’s OA Circuit Porting makes transferring large circuits to new processes faster, easier and more reliable. Accelerate porting your designs smoothly and within the familiar Cadence Virtuoso UI

About AMALIA Circuit Porting

Porting designs from an existing technology to another – to support a new process node, a new fab perhaps – extends the life and the value of your IP portfolio. The task of porting can be complex, and there are many potential pitfalls depending on the circuit size, complexity, and other factors including layout problems the designer is unable to predict and are often only discovered after the design has been ported. Working within a familiar Cadence Virtuoso environment, and part of the powerful AMALIA suite of Thalia circuit and IP reuse tools, OA Circuit Porting provides a familiar user interface to port complex Analog IP circuits to new technologies quickly and easily. De-risking and removing doubts by eliminating unexpected variations in ported circuits, it delivers a significant reduction in time taken to map and port, as well as the number of interventions required after porting The intelligent reporting OA Circuit Porting makes it easy to see where potential problems lie, making proactive decision making easy – to achieve a workable design that you know will fit the target device parameters. OA Circuit Porting makes this possible in the shortest time possible, speeding time-to-market and maximising designer confidence. OA Circuit Porting enables designers to maximise the value of their IP reuse. ,


  • Comprehensive list of process libraries for porting designs
  • Device mapping auto-generator uses a patterns database to recognize device types and generate terminal parameter mapping.
  • Smart routing to avoid jogging and shorts.
  • Designer can switch between original and ported design.
  • Generates flattened cell views with pPar instance properties.
  • Accommodates scaling and calculates required parameters.
  • Splits devices into several ones in case of target device parameter limits excess
  • Checks ported designs can be simulated.
  • Reports enable designer to see any deviation from tolerance limits.
  • Compares source and target instances and flags mismatches or potential issues.
  • Checks that ported instance parameters correspond to those in the device mapping file

Circuit Porting Product Brief

  • Reduces risk of time-consuming and costly issues after porting a design
  • Designers can port with confidence of suitability
  • Significant reduction in time taken to map and port, as well as the number of interventions required after porting
  • Highlights issues with parameters, or tolerance limits
  • Highlights issues with connections (opens and shorts)
  • Enables designers to maximize the value of their IP reuse

Download our Product Brief to find out more.

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